serious skills. comfy setting.



Soan Papdi FPGA!
*No MCU. Pure FPGA!
Soan Papdi is a learning-focused FPGA board built around the Lattice iCE40UP5K, making FPGA development simple and approachable for learners.
The design is intentional - Just the FPGA, Flash memory, a USB-C port for power and loading circuits, and Basics Input/Output.
This is THE board if you wanted to dip yours toes and try Digital Design!
4 Steps - Zero to Hero!
for kids and adults alike
No complicated installation flow. No bullshit driver installation. Download the IDE, double click, get started!
  1. Draw the circuit using building blocks.
  2. Map the inputs and output to FPGA pins.
  3. Verify and Build.
  4. Upload to the board!
Program it using the open-source iCEStudio IDE or use RAW HDL!
Technical Specifications
For beginners and experts alike!
  • Lattice iCE40UP5K FPGA with 5,280 LUTs.
  • 128 Mbit onboard Flash memory.
  • On-chip PLL. Internal 10 kHz and 48 MHz Oscillators.
  • 2 × SPI and 2 × I²C Hard IPs
  • 8 DSP multiplier blocks.
  • Capable of hosting RISC-V soft-core CPUs.
  • USB-C fully controlled by FPGA (no ext. MCU).
  • ⁠Programmable via preloaded DFU bootloader.
  • 3.0 mm LEDs (through-hole)
  • 4 × SMD LEDs
  • 8 x DIP switches
  • 2 push buttons (Programming & Reset)
  • 10 x I/O pins for ext. sensors & peripherals.
Minimal Design
less is more
A3-A0, B3-B0
These are two sets of switches specifically to serve as user inputs for circuits that we develop.
D7-D0
These are Yellow LED to serve as the outputs for our circuits and show the output value.
I0-I9
General purpose I/O pins to connect to external circuits.
PROG and RESET
RESET is to reboot the board. When PROG is pressed and RESET is toggled, the board is ready to accept the new configuration.
S3-S0
Status LEDs for our circuits.
SRAM
The circuit configuration are held in SRAM. When the board is powered on, the FPGA pulls the configuration and realizes the circuit.
iCE40UP5k
The soul of Soan Papdi board is the FPGA by Lattice Semiconductor - the iCE40UP5k. We picked this FPGA because the open-source community loves it. It is very easy to program using open-source tools and utilities. Besides all of this, it has enough LUTs(logical units) to realize the RISC-V CPU.
Free Lectures
Lectures to guide you on how to use the board
This is a ever growing resource
the backstory
Soan Papdi is deliberate and very intentional
Soan Papdi board is designed to be easy to use, be simple in design and not limit the learner.
Ready to Ship
Hand assembled and tested by Hardik (personally). Ready to be shipped.
the team
a collaboration between Pyjama Cafe and DIY with Hardik
Hardik Seth
Embedded Engineer
STEMpedia
An embedded product engineer who designs PCBs, writes firmware, and enjoys turning ideas into complete, working hardware products from first schematic to final blink.
Engineer by day, Maker by night - playing with electronics since the age of 9. From childhood, I’ve loved tearing things apart, rebuilding them, and learning through hands-on experimentation and how-to videos.
Piyush Itankar
Senior Embedded SW Engineer
Google | Ex-Intel
Electrical Engineer holding a Master’s degree in Embedded Systems, with a proven track record at industry giants. At Intel, contributed expertise to Navigation Firmware, Bluetooth Driver development, and RF validation software.
Currently thriving as an Embedded Software Engineer at Google, drove innovation in Firmware development for the Power Management Sub-system on Tensor SoCs (Pixel Phones) and presently advancing system software for the Pixel Watch.
Proposal of Soan Papdi was made by Piyush, the idea was brought to life by Hardik.
Made with Love and Care, in India ❤️
Get your own Soan Papdi

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